Damascene techniques generally involve depositing an interlevel dielectric (ILD) layer, forming an opening in the ILD, overfilling the opening with a metal such as copper (Cu), and removing excess metal using chemical mechanical polishing (CMP). Multiple ILD layers are typically used which results in an overall interconnect structure having many wiring levels. The openings typically resemble a trench running essentially parallel to the surface of the substrate, and a filled trench is referred to as a “wire” or a “line”. These are used to route signals from one location on an integrated circuit (IC) to another location. The openings forming the trench (for the wire) may extend only partially into the thickness of the ILD from the top surface. In dual damascene techniques, an opening in the ILD includes both a lower via (to contact the line beneath) in communication with an upper trench (and further may include other trenches without associated vias). Proper alignment of the via to the lower metal line is necessary for proper operation of the integrated circuit.
Accordingly, the inventors have developed improved techniques for forming 2-dimensional self-aligned vias for advanced interconnects.